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74
Table 133. REGISTER 0Xbf  SMBus Master Mask 4 (PowerOn Default = 0x00)
Bit
Description
R/W
Name
<2>
HILO2
R/W
Logic 1 masks limit assertions for SMBus Device 2
<3>
HILO3
R/W
Logic 1 masks limit assertions for SMBus Device 3
<4>
HILO4
R/W
Logic 1 masks limit assertions for SMBus Device 4
<5>
HILO5
R/W
Logic 1 masks limit assertions for SMBus Device 5
<6>
HILO6
R/W
Logic 1 masks limit assertions for SMBus Device 6
<7>
HILO7
R/W
Logic 1 masks limit assertions for SMBus Device 7
Table 134. REGISTER 0xC0  SMBus Master Mask 5 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
<0>
TIV0
R/W
Logic 1 masks data invalid assertion for SMBus Device 0
<1>
TIV1
R/W
Logic 1 masks data invalid assertion for SMBus Device 1
<2>
TIV2
R/W
Logic 1 masks data invalid assertion for SMBus Device 2
<3>
TIV3
R/W
Logic 1 masks data invalid assertion for SMBus Device 3
<4>
TIV4
R/W
Logic 1 masks data invalid assertion for SMBus Device 4
<5>
TIV5
R/W
Logic 1 masks data invalid assertion for SMBus Device 5
<6>
TIV6
R/W
Logic 1 masks data invalid assertion for SMBus Device 6
<7>
TIV7
R/W
Logic 1 masks data invalid assertion for SMBus Device 7
Table 135. SMBus MASTER LIMIT REGISTERS
Register Address
R/W
Description
PowerOn Default
0xC1
R/W
SMBus Device High Limit.
Programmed as an unsigned 8bit value
0x7F
0xC2
R/W
SMBus Device Low Limit.
Programmed as an 8bit 2s complement value.
0x81
Table 136. SMBus MASTER THERM LIMIT REGISTERS
Register Address
R/W
Description
PowerOn Default
0xC3
R/W
SMBus Device THERM Limit.
Programmed as an unsigned 8bit value
0x64
Table 137. SMBus DEVICE TMIN REGISTER
Register Address
R/W
Description
PowerOn Default
0xC6
R/W
SMBus Device Tmin value. This sets the the temperature at which fans
controlled by any SMBus slave device will turn on.
Programmed as an unsigned 8bit value in the range 0癈 to 175癈.
0x5A
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